|genovese basil||parsley||sweet basil||stevia||stevia||lettuce|
|genovese basil||thyme||sweet basil||stevia||stevia||kale|
The plants like the new lighting. As more mature leaves (past the cotyledon) started to appear, I started feeding them the leafy plant nutrients I discussed in this blog post at a strength of ~ 1/10 the EC value of basil (using info on my First Grow spreadsheet). I haven’t added back the lettuce and kale plants I managed to destroy.
Growth Sensor Puck
YIPPEE! THANK YOU SPARKX FOR PUBLISHING YOUR CCS811 BOB
Updated Schematic and BoM
I took SparkX’s CCS8 Eagle Schematic/Layout (GitHub location) to a Kicad evolution of the Growth Sensor Puck schematic (GitHub location). The “big” difference is the inclusion of the Si7006. I ran makedigikeyBOM (ooh – it worked AND I found a “bug” in the jellybean parts file!):
Looking through my box-o-parts (I standardize on 0805 when possible):
Besides the CCS811 and Si7006, I do not have 4K7 resistors. I added these to my current Digikey backorder for the CCS811 and the Si7006.
A challenge I have with Kicad is finding footprints when I am in cvpcb. One example is the footprint for the optional 10k thermistor that has a through hole footprint. I was challenged to find a tht resistor footprint that had a 2.54mm spacing.
the image is from this data sheet. So I made my own. Simple to do but I can’t help thinking I’m wasting my time since these footprints probably exist.
and…yah…i think i wasted my time making the layout (even if it was simple…I certainly am not getting younger 🙂 )…further bumbling within cvpcb lead me to the Socket_Strips library. Where I associated the optional thermistor with the 1 x 02 straight socket strip with a 2.54 mm pitch.
It would be a D’OH moment if the board was turned back from OSHPark because I did not adhere to their design rules. It’s been awhile since I sent a PCB to OSHPark so I went back to check OSHPark’s design rules:
- 6 mil minimum trace width
- 6 mil minimum spacing
- at least 15 mil clearances from traces to the edge of the board
- 13 mil minimum drill size
- 7 mil minimum annular ring
I discussed what the design rules refer to (e.g.: the term “annular ring” was not a term I was familiar with) in this post.
Based on what I used in the post, here are the design rules I am using for tracks and vias:
That’s as far as I got today…excited to see what I can do tomorrow.