Tags

,

Unknowns came up while I was testing the EC circuit of the Ladybug Shield Alpha 1:

  • The characteristics of the shrunken AC Waveform.  My calculations have been assuming Vin doesn’t change.  Does it?  If it does, the variability will have a significant impact on the EC measurement.
  • Rectification.  I’ve observed a drift in results.  Does the peak detection part of the circuit need to be reset?  I use the circuit discussed in this blog post for rectification.
  • Rectification.  The Vpp I observed on the scope was around 80mV.  Is this the best I can get?  If it is, the digital values will be noisy.  Certainly it is best to go into an ADC with the cleanest DC signal.

The Goal

The Goal of this post is to investigate and understand the unknowns.  The outcome will evolve the design of the EC circuit.

The Files

The Kicad files that I used to create the test prototype is located at this GitHub location.

 

Thanks To Those That Went Before

A very grateful thank you to Chris Gammel.  He helped me with the direction to take with this prototype.  The new Contextual Electronics course is about to start.  I can’t wait to participate and continue to learn!

What to Test

As I walked through what I was observing in the EC Circuit with Chris, He broke up the circuit in a very understandable way. He also pointed out a test circuit in which switches are used to decide which circuit to test:

ChrisDrawingOfECCircuit

The AC Waveform created by the Wien Bridge Oscillator is shrunk to ~ 200mV Vpp.  The shrunken signal is Vin to the Gain loop that has the EC probe as a variable resistor.  Vout goes into a rectifier whose output is fed into an ADC.

 

Chris had a great suggestion.  Why not test the shrunken signal through the rectifier and also test the affect the Gain loop has?  Brilliant.  The unknowns I noted at the beginning can be easily tested this way.  The way I will do this is to put a SPDT switch on either side of the gain loop.

Schematics

As noted earlier, the Kicad files are located at this GitHub location.  I created a hierarchical schematic.  I’ve been thinking about how best to combine the process of drawing a block diagram (as shown in the image above) with the high level of the schematic.  Here’s what I came up with.

LBS-TEST1Schematic

I liked Kicad’s ability to include an image onto a schematic.  I put the SPDT switches off to a breadboard.  This is represented by the blue drawing.  Blue text and drawing are annotations – not part of the board’s design.  It is nice to be able to do this for this prototype, since part of the functionality:

  • SPDT switches
  • ADC

will be on a breadboard connected by wires to the prototype board.

On To Metrix Create:Space

I am not thrilled with the layout.

LBS-TEST1Layout

 There are too many vias.  I went through the process that goes into the making of the prototype boards in a previous post.  Unlike the PCBs done at OshPark, the vias are not plated.  This means I must solder a piece of wire in a via.  What I ended up doing is making the vias the size of the wire I use in my breadboard.  This way soldering is easy.

 

Hopefully, I’ll be able to test this weekend.  

 

That’s it for now.  Please find many things to smile about.

Advertisements