I discussed my D’OH moment with the Healthy EC Dev-Rev1 design in this post. Yes, a learning opportunity it was ! 🙂
The goal of this post is to capture some of the “lessons learned” as I evolved the Healthy EC Dev-Rev2 design and layout. Each update of the design and layout is an opportunity to evolve understanding/abilities in these skills.
Thanks To Those That Went Before
OshPark continues to be an excellent company. My latest joy has been their support. I know, Joy and Support typically don’t go together. They certainly do when there are folks like Dan Sheadel handling support. I had a problem that I didn’t think “was my fault” and Dan not only fixed it, but explained in detail the trade-offs. Time consuming for him to do that, but totally appreciated on my part – making me feel like a very loyal customer who very much wants OshPark to succeed.
The Value of “Family and Friends” Net Names
I’m starting to think of components on the schematic and layout as being family or friends. Components that are family share the same wire. Friends are in the circuit, but don’t share the same wire.
To illustrate, here are the family and friends in the Wien Bridge Oscillator part of the circuit:
All components are friends. They share a common goal – which is to generate an AC Waveform. R16, R15, D4,D5, and pin 6 are members of the blue family. Pin 7, TP20, C9, C10, R15, and R13 (on schematic – cut off in picture above) are members of the purple family, etc. Since components connect wires together, they can belong to multiple families.
When I label wires to show friends and family, it is easier to group components and lay down tracks in the layout.
For example, putting the OSC1 and OSC2 labels – naming that reflects what is in the MCP3901 data sheet (link) – on the schematic:
Made it easy for me to know where to place the crystal (X1), C5, and C4.
By following this technique of “family and friends” net naming, I was able to speed up the layout process and – hopefully – increase the chances of the layout being “better” by making it more obvious – for example – making it more obvious which capacitor is a decoupling capacitor for a component.
GND (and Power) Planes Should be Defined Before Laying Tracks
Once I arranged the components into family and friends, I’m going to look at the GND planes. I use three GND planes in this design:
AGND comes from a wall wart. VGND is the voltage divider/op amp part of the EC Circuit that raises the ground such that the AC Waveforms entering the op amps stays within positive voltage. GND is from the Arduino.
What got challenging was the wedge of VGND in the center of the layout caused by the pins of the MCP6244 quad op amp. Pin 11 uses AGND for the -V rail (0V). Pins 1 and 2 are part of the voltage divider circuit that creates VGND. I ended up putting a strip in the middle such that there was an AGND plane for the AGND pins and a VGND plane for the VGND pins. I tried to make all planes as wide as possible so that they would be the most effective.
I wanted to capture challenges I come across in design and layout and suggest techniques to minimize the time/frustration it takes to work through them.
Thank you for reading this far. I hope you find many things to smile about. Today and tomorrow and every other day.