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I was watching a video for the Contextual Electronics course I am taking.  This one covered using a free DFM tool, freeDRM.   The freeDRM tool would most typically be used by an Advanced Circuits  customer.  I am using it as a free tool in the way Chris did – as a sanity check.

The thing I need to keep in mind is the design rules are different for Advanced Circuits and OshPark.  Advanced Circuits’ design rules are discussed in this document.  The design rules from OshPark are more important since this is where the board will be fabricated.  From the OshPark Design Rules web page:

  • 6 mil minimum trace width
  • 6 mil minimum spacing
  • at least 15 mil clearances from traces to the edge of the board
  • 13 mil minimum drill size
  • 7 mil minimum annular ring

I plotted the Gerber files and ran freeDRM on them to see if the tool detects any design errors…and…

there were errors I needed to fix.   What this pointed out to me was the importance of setting the Design Rules to those of the fabrication company.

Design Errors

There were two sets of design errors that were considered “show stoppers”:

  • the drill size and diameter of many of the vias.
  • the track width of several traces.


I made a mistake on the diameter and hole size of most of the vias.  The error results for this are listed here.  The text in the error report notes: Requirements:We require a minimum of .005” annular ring for vias…

OshPark’s minimum annular ring is 7 mils – 2 mils larger.



via size errors

I am very happy the tool caught these errors.  While at the same time I feel like banging my head on the desk for making this avoidable error.

The reason?  I did not set the design rules correctly!  Here is what I was using before I fixed the via size errors:


hmmm…not good. Most of the vias use the default settings.  Why is the trace width 4 mils when OshPark clearly notes a 6 mil minimum trace width?  Why is the minimum via drill size 5 mils when OshPark states the minimum drill size should be 13 mils.  Finally, why is the via diameter 13 mi?  The minimum defaults should be a via diameter of 27 mils (7 mil annular ring*2  + 13 mil drill size = 27 mils).  From what I can tell it means I was clueless about the importance and setting of design rules prior to laying down vias and tracks.  Hopefully, knowledge means I won’t repeat this mistake on my future PCB layout efforts.  

I updated the design rules to be:


I ran the FreeDFM tool a few more times until I got a YIPPEE! moment:


Now I’m not sure about the “Problems Automatically Fixed.”  I’m going to ignore these for now.  I think I’m ok at this point for fabrication.  I am sure I will find out soon enough if I am not! 


Thanks for reading this far.  Please find many things to smile about!